Supervisory authorities

CNRS Ecole Centrale de Lyon Université de Lyon Université Lyon 1 INSA de Lyon

Our partners



Home > Thèses et HDR > Thèses en 2021

24/11/2021 - Joao André SOARES DE OLIVEIRA

by Laurent Krähenbühl - published on , updated on


Ajouter un événement iCal

Joao Oliveira defends his PhD on Nov. 24, 2021 at 10:00 AM.
Place : Amphi AE2, Bât. G. Ferrié, INSA Lyon

A Methodology for Designing SiC and GaN Device Based Converters for Automotive Applications.

Jury :
Rapporteurs :
CASTELLAZZI, Alberto, Professeur, Kyoto University of Advanced Science
LEFEBVRE, Stéphane, Professeur, CNAM

Autres membres :
LADOUX, Philippe, Professeur, INP – ENSEEIHT
ISOIRD, Karine, Maître de Conférences, LASS – CNRS
ARIOUA, Leyla, Docteur, VEDECOM ITE, (Invitée)

Encadrement :
MOREL, Hervé, Docteur, INSA de Lyon (Directeur de Thèse)
PLANSON, Dominique, Professeur, INSA de Lyon (Co-directeur de Thèse)
LOISELAY, Florent, Ingénieur de Recherche, VEDECOM ITE (Co-encadrant)

Abstract :
The wide band-gap (WBG) devices enable power converter designs at higher frequency, power density and efficiency, when compared to silicon-based converters. The coexistence for SiC and GaN devices in the ranges 600-900 V motivates a specified study of these components and the development of methods to perform better selection relying on the application, particularly for automotive applications. The proposed methodology starts with static and dynamic tests performed for SiC and GaN devices to validate their models. GaN power devices allow building the most integrated converters. An instrumented PCB is developed to measure and estimate switching losses including the measurement points needed for this purpose. The parasitic elements of the PCB layout extracted by ANSYS Q3D and the measurement instrument models are also included in the simulation model. Thus, by means of an experimentally validated model, it will be possible to evaluate the total losses in an optimized circuit, without probes. For SiC devices, an evaluation board is used and a estimating method for inductance parasitic extraction is performed. The switching loss estimation is an important step for power converter design. The consequences of faster switching on the gate driver design and board layout generate new challenges for WBG-based converters. An accurate switching loss estimation is a helpful step because it allows adjusting different circuit layouts based on the simulation results. However, the instrumented PCB does not predict the switching losses in an optimized converter, but only on the instrumented PCB. A simulation for each target device (SiC and GaN) is developed considering the main parasitic elements and the measurement instrument models. Thus, the switching losses are computed and compared to experimental results. Since the whole system is validated, to compare the SiC and GaN devices for automotive applications, a optimized DC-DC converter simulation is used for comparing each device under different operation points of the converter.

Keywords : Power Semiconductor Devices, Silicon Carbide, Gallium Nitrite, Wide Bandgap Semiconductor, Converter Design, Automotive Applications

View online : Texte complet